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| FAN6751MR -- Highly-Integrated Green-Mode PWM Controller September 2008 FAN6751MR Highly-Integrated Green-Mode PWM Controller Features High-Voltage Startup Low Operating Current: 4mA Linearly Decreasing PWM Frequency to 18KHz Fixed PWM Frequency: 65KHz Peak-current-mode Control Cycle-by-cycle Current Limiting Leading-edge Blanking (LEB) Synchronized Slope Compensation Internal Open-loop Protection GATE Output Maximum Voltage Clamp: 18V VDD Under-Voltage Lockout (UVLO) VDD Over-Voltage Protection (OVP) Internal Recovery Circuit (OVP, OLP) Internal Sense Short-Circuit Protection External Constant Power Limit (Full AC Input Range) Internal OTP Sensor with Hysteresis Built-in 5ms Soft-Start Function Built-in VIN Pin Pull HIGH (> 4.7V) Recovery Function for Second-Side Output OVP Brownout Protection with Hysteresis Description The highly integrated FAN6751 series of PWM controllers provides several features to enhance the performance of flyback converters. To minimize standby power consumption, a proprietary green-mode function provides off-time modulation to linearly decrease the switching frequency at light-load conditions. To avoid acoustic-noise problems, the minimum PWM frequency is set above 18KHz. This green-mode function enables the power supply to meet international power conservation requirements. With the internal high-voltage startup circuitry, the power loss due to bleeding resistors is also eliminated. To further reduce power consumption, FAN6751 is manufactured using the BiCMOS process, which allows an operating current of only 4mA. Built-in synchronized slope compensation achieves stable peak-current-mode control. The proprietary, external line compensation ensures constant output power limit over a wide AC input voltage range, from 90VAC to 264VAC. FAN6751 provides many protection functions. In addition to cycle-by-cycle current limiting, the internal open-loop protection circuit ensures safety should an open-loop or output short-circuit failure occur. PWM output is disabled until VDD drops below the UVLO lower limit, when the controller starts up again. As long as VDD exceeds ~26V, the internal OVP circuit is triggered. FAN6751 is available in an 8-pin SOP package. Applications General-purpose switch-mode power supplies and flyback power converters, including: Power Adapters Open-frame SMPS Ordering Information Part Number FAN6751MRMY Operating Temperature Range -40C to +105C Eco Status Green Package 8-Lead, Small Outline Package (SOP-8) Packing Method Tape & Reel For Fairchild's definition of "green" Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. (c) 2008 Fairchild Semiconductor Corporation FAN6751MR * Rev. 1.0.0 www.fairchildsemi.com FAN6751MR -- Highly-Integrated Green-Mode PWM Controller Application Diagram Figure 1. Typical Application Internal Block Diagram Figure 2. Functional Block Diagram (c) 2008 Fairchild Semiconductor Corporation FAN6751MR * Rev. 1.0.0 www.fairchildsemi.com 2 FAN6751MR -- Highly-Integrated Green-Mode PWM Controller Marking Information F: Fairchild logo Z: Plant code X: 1 digit year code Y: 1 digit week code TT: 2 digits die run code T: Package type (N:DIP, M:SOP) P: Y=Green package M: Manufacture flow code Figure 3. Top Mark ZXYTT 6751MR TPM Pin Configuration SOP-8 GND FB NC HV 1 2 3 4 8 7 6 5 GATE VDD SENSE VIN Figure 4. Pin Configuration (Top View) Pin Definitions Pin # 1 2 3 4 5 Name GND FB NC HV VIN Description Ground. The signal from the external compensation circuit is fed into this pin. The PWM duty cycle is determined in response to the signal on this pin and the current-sense signal on the SENSE pin. No connection. For startup, this pin is pulled high to the line input or bulk capacitor via resistors. Line-voltage detection. The line-voltage detection is used for brownout protection with hysteresis. Constant output power limit over universal AC input range is also achieved using this VIN pin. It is suggested to add a low pass filter to filter out line ripple on bulk capacitor. VIN pulling high triggers latch protection. Current sense. The sensed voltage is used for peak-current-mode control and cycle-by-cycle current limiting. Power supply. The internal protection circuit disables PWM output as long as VDD exceeds the OVP trigger point. The totem-pole output driver. Soft-driving waveform is implemented for improved EMI. 6 7 8 SENSE VDD GATE (c) 2008 Fairchild Semiconductor Corporation FAN6751MR * Rev. 1.0.0 www.fairchildsemi.com 3 FAN6751MR -- Highly-Integrated Green-Mode PWM Controller Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VDD VFB VSENSE VVIN VHV PD JA TJ TSTG TL ESD DC Supply Voltage (1, 2) Parameter FB Pin Input Voltage SENSE Pin Input Voltage VIN Pin Input Voltage HV Pin Input Voltage Power Dissipation (TA50C) Thermal Resistance, Junction-to-Air Operating Junction Temperature Storage Temperature Range Lead Temperature (Wave Soldering or IR, 10 Seconds) Electrostatic Discharge Capability, Human Body Model: JESD22-A114 Electrostatic Discharge Capability, Machine Model: JESD22-A115 All pins except HV pin All pins except HV pin Min. -0.3 -0.3 -0.3 Max. 30 7.0 7.0 7.0 500 400 141 Unit V V V V V mW C/W C C C kV V -40 -55 +150 +150 +260 4 200 Notes: 1. All voltage values, except differential voltages, are given with respect to the network ground terminal. 2. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. (c) 2008 Fairchild Semiconductor Corporation FAN6751MR * Rev. 1.0.0 www.fairchildsemi.com 4 FAN6751MR -- Highly-Integrated Green-Mode PWM Controller Electrical Characteristics VDD=15V, TA=25C, unless otherwise noted. Symbol VDD Section VOP VDD-ON VDD-OFF IDD-ST IDD-OP IDD-OLP VTH-OLP VDD-OVP tD-VDDOVP Parameter Continuously Operating Voltage Start Threshold Voltage Minimum Operating Voltage Startup Current Operating Supply Current Internal Sink Current IDD-OLP Off Voltage VDD Over-Voltage Protection VDD Over-Voltage Protection Debounce Time Conditions Min. Typ. Max. 22 Units V V V A mA A V V s 15.5 9.5 VDD-ON - 0.16V VDD=15V, GATE Open VTH-OLP+0.1V 30 6.5 25 75 16.5 10.5 17.5 11.5 30 4 70 7.5 26 130 5 90 8.0 27 200 HV Section IHV IHV-LC Supply Current Drawn from HV Pin Leakage Current after Startup VAC=90V (VDC=120V), VDD=10F, VDD=0V HV=500V, VDD=VDD-OFF+1V Center Frequency 62 14 VDD=11V to 22V TA=-40 to 85C 2.0 1 3.5 20 mA A Oscillator Section fOSC fOSC-G fDV fDT Frequency in Nominal Mode Green-Mode Frequency Frequency Variation vs. VDD Deviation Frequency Variation vs. Temperature Deviation PWM Turn-off Threshold Voltage PWM Turn-on Threshold Voltage PWM Latch-off Threshold Voltage PWM Latch-off Debounce Time 65 18 68 22 5 5 KHz KHz % % VIN Section VIN-OFF VIN-ON VIN-LATCH TVIN-LATCH 0.65 VIN-OFF+ 0.20 4.5 60 0.70 VIN-OFF+ 0.22 4.7 100 0.75 VIN-OFF+ 0.24 4.9 140 V V V s Continued on following page... (c) 2008 Fairchild Semiconductor Corporation FAN6751MR * Rev. 1.0.0 www.fairchildsemi.com 5 FAN6751MR -- Highly-Integrated Green-Mode PWM Controller Electrical Characteristics VDD=15V, TA=25C, unless otherwise noted. Symbol Parameter Input Voltage to Current-Sense Attenuation Input Impedance Output High Voltage FB Open-loop Trigger Level Delay Time of FB Pin Open-loop Protection Green-Mode Entry FB Voltage Green-Mode Ending FB Voltage Zero Duty-Cycle Input Voltage Conditions Min. Typ. Max. Units Feedback Input Section AV ZFB VFB-OPEN VFB-OLP tD-OLP VFB-N VFB-G VFB-ZDC 1/4.5 4 FB Pin Open 5.5 5.0 5.2 56 2.1 1.6 1.1 5.4 1/4.0 1/3.5 7 V/V k V V ms V V V Current-Sense Section ZSENSE VTH-P at VIN=1V VTH-P at VIN=3V tPD tLEB VS-SCP tD-SSCP TSS Input Impedance Threshold Voltage for Current Limit Threshold Voltage for Current Limit Delay to Output Leading-Edge Blanking Time Threshold Voltage for SENSE ShortCircuit Protection Delay Time for SENSE Short-Circuit Protection Period During Soft-Startup Time VSENSE<0.15V Startup Time 230 0.10 100 4.5 VIN=1V VIN=3V 0.80 0.67 12 0.83 0.70 100 280 0.15 150 5.0 0.86 0.73 200 330 0.20 200 5.5 K V V ns ns V s ms PWM Frequency fOSC fOSC-G VFB-ZDC VFB-G VFB-N VFB Figure 5. VFB vs. PWM Frequency (c) 2008 Fairchild Semiconductor Corporation FAN6751MR * Rev. 1.0.0 www.fairchildsemi.com 6 FAN6751MR -- Highly-Integrated Green-Mode PWM Controller Electrical Characteristics VDD=15V, TA=25C, unless otherwise noted. Symbol GATE Section DCYMAX VGATE-L VGATE-H tr tf IGATESOURCE Parameter Maximum Duty Cycle Gate Low Voltage Gate High Voltage Gate Rising Time Gate Falling Time Gate Source Current Gate Output Clamping Voltage Conditions Min. Typ. 75 Max. Units % VDD=15V, IO=50mA VDD=12V, IO=50mA VDD=15V, CL=1nF VDD=15V, CL=1nF VDD=15V, GATE=6V VDD=22V 8 150 30 250 250 50 1.5 V V 350 90 ns ns mA VGATECLAMP 18 V Over-Temperature Protection Section (OTP) TOTP TRestart Protection Junction Temperature Restart Junction Temperature (4) (3) +135 TOTP-25 C C Notes: 3. When activated, the output is disabled and the latch is turned off. 4. The threshold temperature for enabling the output again and resetting the latch, after over-temperature protection has been activated. (c) 2008 Fairchild Semiconductor Corporation FAN6751MR * Rev. 1.0.0 www.fairchildsemi.com 7 FAN6751MR -- Highly-Integrated Green-Mode PWM Controller Typical Performance Characteristics Figure 6. Startup Current (IDD-ST) vs. Temperature Figure 7. Operation Supply Current (IDD-OP) vs. Temperature Figure 8. Start Threshold Voltage (VDD-ON) vs. Temperature Figure 9. Minimum Operating Voltage (VDD-OFF) vs. Temperature Figure 10. Supply Current Drawn from HV Pin (IHV) vs. Temperature Figure 11. HV Pin Leakage Current After Startup (IHV-LC) vs. Temperature (c) 2008 Fairchild Semiconductor Corporation FAN6751MR * Rev. 1.0.0 www.fairchildsemi.com 8 FAN6751MR -- Highly-Integrated Green-Mode PWM Controller Typical Performance Characteristics (Continued) Figure 12. Frequency in Nominal Mode (fOSC) vs. Temperature Figure 13. Maximum Duty Cycle (DCYMAX) vs. Temperature (c) 2008 Fairchild Semiconductor Corporation FAN6751MR * Rev. 1.0.0 www.fairchildsemi.com 9 FAN6751MR -- Highly-Integrated Green-Mode PWM Controller Functional Description Startup Current For startup, the HV pin is connected to the line input (1N4007 / 100K recommended) or bulk capacitor through a resistor, RHV. Typical startup current drawn from pin HV is 2mA and charges the hold-up capacitor through the diode and resistor. When the VDD capacitor level reaches VDD-ON, the startup current switches off. At this moment, the VDD capacitor only supplies the FAN6751 to keep the VDD before the auxiliary winding of the main transformer to provide the operating current. Gate Output / Soft Driving The BiCMOS output stage is a fast totem-pole gate driver. Cross conduction has been avoided to minimize heat dissipation, increase efficiency, and enhance reliability. The output driver is clamped by an internal 18V Zener diode to protect power MOSFET transistors against undesirable gate over voltage. A soft-driving waveform is implemented to minimize EMI. Soft-Start For many applications, it is necessary to minimize the inrush current at startup. The built-in 5ms soft-start circuit significantly reduces the startup current spike and output voltage overshoot. Operating Current Operating current is around 4mA. The low operating current enables better efficiency and reduces the requirement of VDD hold-up capacitance. Green-Mode Operation The proprietary green-mode function provides off-time modulation to reduce the switching frequency in the light-load and no-load conditions. The on time is limited for better abnormal or brownout protection. VFB, which is derived from the voltage feedback loop, is taken as the reference. Once VFB is lower than the threshold voltage, switching frequency is continuously decreased to the minimum green-mode frequency of around 18KHz. Built-in Slope Compensation The sensed voltage across the current-sense resistor is used for peak-current-mode control and pulse-by-pulse current limiting. Built-in slope compensation improves stability and prevents sub-harmonic oscillation. FAN6751 inserts a synchronized positive-going ramp at every switching cycle. Constant Output Power Limit For constant output power limit over universal inputvoltage range, the peak-current threshold is adjusted by the voltage of the VIN pin. Since the VIN pin is connected to the rectified AC input line voltage through the resistive divider, a higher line voltage generates a higher VIN voltage. The threshold voltage decreases as the VIN voltage increases, making the maximum output power at high-line input voltage equal to that at low-line input. The value of R-C network should not be so large it affects the power limit (shown as Figure 14). Usually, R and C are less than 100 and 470pF, respectively. Current Sensing / PWM Current Limiting Peak-current-mode control is utilized to regulate output voltage and provide pulse-by-pulse current limiting. The switch current is detected by a sense resistor into the SENSE pin. The PWM duty cycle is determined by this current sense signal and VFB, the feedback voltage. When the voltage on SENSE pin reaches around VCOMP=(VFB-1.2)/4, a switch cycle is terminated immediately. VCOMP is internally clamped to a variable voltage around 0.85V for output power limit. Leading-Edge Blanking (LEB) Each time the power MOSFET is switched on, a turn-on spike occurs on the sense-resistor. To avoid premature termination of the switching pulse, a leading-edge blanking time is built in. During this blanking period, the current-limit comparator is disabled and it cannot switch off the gate driver. SG5841 Gate Blanking Circuit Sense Under-Voltage Lockout (UVLO) The turn-on and turn-off thresholds are fixed internally at 16.5V and 10.5V respectively. During startup, the hold-up capacitor must be charged to 16.5V through the startup resistor to enable the IC. The hold-up capacitor continues to supply VDD before the energy can be delivered from auxiliary winding of the main transformer. VDD must not drop below 10.5V during this process. This UVLO hysteresis window ensures that hold-up capacitor is adequate to supply VDD during startup. Figure 14. Current Sense R-C Filter (c) 2008 Fairchild Semiconductor Corporation FAN6751MR * Rev. 1.0.0 www.fairchildsemi.com 10 FAN6751MR -- Highly-Integrated Green-Mode PWM Controller VDD Over-Voltage Protection (OVP) VDD over-voltage protection is built-in to prevent damage due to abnormal conditions. Once the VDD voltage is over the over-voltage protection voltage (VDDOVP), and lasts for tD-VDDOVP, the PWM pulses are disabled until the VDD voltage drops below the UVLO, then starts again. Over-voltage conditions are usually caused by open feedback loops. Limited Power Control The FB voltage increases every time the output of the power supply is shorted or overloaded. If the FB voltage remains higher than a built-in threshold for longer than tD-OLP, PWM output is turned off. As PWM output is turned off, VDD begins decreasing. When VDD goes below the turn-off threshold (~10.5V), the controller is totally shut down. VDD is charged up to the turn-on threshold voltage of 16.5V through the startup resistor until PWM output is restarted. This protection feature continues as long as the overloading condition persists. This prevents the power supply from overheating due to overloading conditions. Brownout Protection Since the VIN pin is connected through a resistive divider to the rectified AC input line voltage, it can also be used for brownout protection. If the VIN voltage is less than 0.7V, the PWM output is shut off. If the VIN voltage over 0.92V, the PWM output is turned on again. The hysteresis window for on/off is around 0.22V. The brownout voltage setting is determined by the potential divider formed with RUpper and RLower. To calculate the resistors: Noise Immunity Noise on the current sense or control signal may cause significant pulse-width jitter, particularly in continuousconduction mode. Slope compensation helps alleviate this problem. Good placement and layout practices should be followed. Avoiding long PCB traces and component leads, locating compensation and filter components near the FAN6751, and increasing the power MOS gate resistance improve performance. VIN = RLower x VAC , (unit = V ) RLower + RUpper (1) Thermal-Overload Protection Thermal-overload protection limits total power dissipation. When the junction temperature exceeds TJ = +135C, the thermal sensor signals the shutdown logic and turns off most of the internal circuitry. The thermal sensor turns internal circuitry on again after the IC's junction temperature drops by 25C. Thermaloverload protection is designed to protect the FAN6751 in the event of a fault condition. For continual operation, do not exceed the absolute maximum junction temperature rating of TJ = +150C. (c) 2008 Fairchild Semiconductor Corporation FAN6751MR * Rev. 1.0.0 www.fairchildsemi.com 11 FAN6751MR -- Highly-Integrated Green-Mode PWM Controller Physical Dimensions 5.00 4.80 3.81 8 5 A 0.65 B 6.20 5.80 4.00 3.80 1 4 1.75 5.60 PIN ONE INDICATOR (0.33) 1.27 0.25 M CBA 1.27 LAND PATTERN RECOMMENDATION 0.25 0.10 1.75 MAX C 0.10 0.51 0.33 0.50 x 45 0.25 C SEE DETAIL A 0.25 0.19 OPTION A - BEVEL EDGE R0.10 R0.10 GAGE PLANE 0.36 OPTION B - NO BEVEL EDGE NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AA, ISSUE C, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M. E) DRAWING FILENAME: M08AREV13 8 0 0.90 0.406 SEATING PLANE (1.04) DETAIL A SCALE: 2:1 Figure 15. 8-Pin, Small Outline Package (SOP) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. (c) 2008 Fairchild Semiconductor Corporation FAN6751MR * Rev. 1.0.0 www.fairchildsemi.com 12 FAN6751MR -- Highly-Integrated Green-Mode PWM Controller (c) 2008 Fairchild Semiconductor Corporation FAN6751MR * Rev. 1.0.0 www.fairchildsemi.com 13 |
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